•; Lead verification for complex, high-performance ASIC/FPGA designs • Define and execute advanced verification strategies and methodologies • Collaborate across architecture, software, and validation teams from concept to delivery • Mentor engineers and promote a culture of technical excellence and innovation • Work with technologies like high-speed interfaces, network processors, and SoCs
You will drive the development of robust, scalable, and efficient VLSI design, working closely with global Architecture, hardware simulator and Software teams to shape Ceva’s next generation of AI solutions. We are looking for an exceptional hands-on leader with strong technical expertise, proven experience leading VLSI Front-End Design engineers, and a track record of delivering complex, state-of-the-art products on time and in production ready quality. The ideal candidate is execution-driven, innovative, and passionate about building high-performing teams and cutting-edge AI technology. Responsibilities Manage and lead a group of Front-End Design engineers. Be accountable for the team’s development lifecycle, including architecture, development, validation, and release, focusing on meeting PPAA targets. Lead development of advanced VLSI Ips for AI processors, DSP and HW accelerators while continuing pushing the VLSI design methodologies, procedures, sign off and AI tools assimilation to its next level. Support system bring-up, debugging, and customer-facing activities when needed
Responsibilities: - Develop and execute verification plans for digital designs. - Create and implement testbenches using SystemVerilog and UVM methodology. - Perform functional verification, simulation, and formal verification to identify and resolve design issues. - Collaborate with hardware, software, and firmware teams for comprehensive verification coverage.